`include "../define.svh"
module SignAndExp (
    input [1:0] data_type,
    input mix_precision,
    input [7:0] e1,
    input [7:0] e2,
    input s1,
    input s2,
    output s_out,
    output reg signed [8:0] e_out
);

    // 常量定义（正偏置）
    localparam FP16_BIAS = 8'd15;
    localparam FP32_BIAS = 8'd127;
    localparam MIX_BIAS = FP32_BIAS - 2*FP16_BIAS; // 97

    assign s_out = s1 ^ s2;

    always @(*) begin
        casez ({data_type, mix_precision})
            {`FP16, 1'b0}: e_out = e1 + e2 - FP16_BIAS; // 纯FP16
            {`FP32, 1'b0}: e_out = e1 + e2 - FP32_BIAS; // 纯FP32
            {3'b??1}:      e_out = e1 + e2 + MIX_BIAS;  // 混合精度
            default:       e_out = 0;
        endcase
    end
endmodule